在design house做了三年的DV，才疏學淺，但希望能夠將DV學完整，並有所發揮。目前大概就摸了半顆ic的程度。心得也只是在公司看到的狀況，不代表整個園區，觀念也不一定正確
很感謝當初找我進來的主管還有罩我的學長，不然以我講話很直的狀況，應該會一直被打槍吧。
未來不是現在，看看有沒有軟體部門要收留我吧，感覺os和compiler、fw那裡還滿有趣的
2012/11/18
[ARM] coprocessor CP15 - system control coprocessor
Purpose
Cortex-A8 Technical Reference Manual Revision: r3p2 3.1. About the system control coprocessor
The purpose of the system control coprocessor, CP15, is to control and provide status information for the functions implemented in the processor. The main functions of the system control coprocessor are:
- overall system control and configuration
- cache configuration and management
- Memory Management Unit (MMU) configuration and management
- preloading engine for L2 cache
- system performance monitoring.
Instruction
mcr{cond} p15, <opcode_1>, <rd>, <CRn>, <CRm>, <opcode_2>mrc{cond} p15, <opcode_1>, <rd>, <CRn>, <CRm>, <opcode_2>
Following the order, CRn -> Op1 -> CRm -> Op2, to look up the entry of target register in manual.
Cortex-A15 MPCore Technical Reference Manual Revision: r3p2 4.2. Register summary
Table 4.1. Column headings definition for CP15 register summary tables
Catagory
| Function | CP15 Registers |
| System Configuration | c0 |
| System Control | c1 |
| Translation Base Control | c2 |
| Domain Access Control | c3 |
| Faults | c5/c6 |
| Cache Operations | c7 |
| TLB Operations | c8/c10 |
| Performance Monitor | c9 |
| L2 Control | c9 |
| Pre-load Engine | c11 |
| Interrupts | c12 |
| Process ID | c13 |
| Memory Arrays | c15 |
Table 4.3. c1 register summary
The mapping is c1 -> 0 -> c0 -> to access System Control Register.
mcr p15, 0, rX, c1, c0, 0 : write arm to coprocessor , rX -> {c1, 0, c0, 0}
mrc p15, 0, rX, c1, c0, 0 : read coprocessor to arm , {c1, 0, c0, 0} -> rX
2012/11/11
Those Things about Memory Mapping ... / Memory Mapping 的那些事
I have just learned computer architecture but OS so never linked them at all. These days I finished tracing a sample bootcode and read the arm programming guide. A sentence caught my eye which means every process has its own memory mapping, there are many page tables on runtime. I was too stupid to think there was only one page table where one program occupied part of memory and the code followed the rules in the part of memory, instructions on the bottom, stack on the top... Another impact was that it could allocate new memory by updating the page tables. I never knew it.
Several days after that day, I continuously construct the imagination of the code arrangement in the memory mapping, how the OS deals with the page tables. I only know that one program must ask the OS to get more space.
2012/11/10
[ARM] DMB, DSB, ISB
Definition
Home > ARM and Thumb Instructions > Miscellaneous instructions > DMB, DSB, and ISB
DMB
Data Memory Barrier acts as a memory barrier. It ensures that all explicit memory accesses that appear in program order before the
DMB instruction are observed before any explicit memory accesses that appear in program order after the DMB instruction. It does not affect the ordering of any other instructions executing on the processor.DSB
Data Synchronization Barrier acts as a special kind of memory barrier. No instruction in program order after this instruction executes until this instruction completes. This instruction completes when:
- All explicit memory accesses before this instruction complete.
- All Cache, Branch predictor and TLB maintenance operations before this instruction complete.
ISB
Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed. It ensures that the effects of context altering operations, such as changing the ASID, or completed TLB maintenance operations, or branch predictor maintenance operations, as well as all changes to the CP15 registers, executed before the ISB instruction are visible to the instructions fetched after the ISB.
In addition, the ISB instruction ensures that any branches that appear in program order after it are always written into the branch prediction logic with the context that is visible after the ISB instruction. This is required to ensure correct execution of the instruction stream.
ISB
ISB are fetched from cache or memory, after the instruction has been completed. It ensures that the effects of context altering operations, such as changing the ASID, or completed TLB maintenance operations, or branch predictor maintenance operations, as well as all changes to the CP15 registers, executed before the ISB instruction are visible to the instructions fetched after the ISB.ISB instruction ensures that any branches that appear in program order after it are always written into the branch prediction logic with the context that is visible after the ISB instruction. This is required to ensure correct execution of the instruction stream.2011/07/03
To write assembly code in c code
http://www.ibiblio.org/gferg/ldp/GCC-Inline-Assembly-HOWTO.html
I need to write some assembly code in c code for embedded system. It's simple
if only pure assembly code is needed. Just write op code with registers in a .s file. Unfortunately, it has to link variables in c code to assembly code, so I need more advanced knowledge.
I need to write some assembly code in c code for embedded system. It's simple
if only pure assembly code is needed. Just write op code with registers in a .s file. Unfortunately, it has to link variables in c code to assembly code, so I need more advanced knowledge.
2011/06/05
[vim] 列出文章中搜尋結果
http://stackoverflow.com/questions/137935/how-to-jump-to-an-occurrence-from-vim-search-list
每次看到學長用這個功能都覺得好神，終於被我找到了，這個功能主要是在視窗下緣列出搜尋的結果，如下圖。
打 [+shift i 就會顯示出來，但他好像使用的是完整匹配，而非原本搜尋的部份匹配，所以游標要移到要搜尋的字串上，接著在呼叫出這個list後打 :+行號，就可以跳到要尋找的行號，非常方便。
每次看到學長用這個功能都覺得好神，終於被我找到了，這個功能主要是在視窗下緣列出搜尋的結果，如下圖。
打 [+shift i 就會顯示出來，但他好像使用的是完整匹配，而非原本搜尋的部份匹配，所以游標要移到要搜尋的字串上，接著在呼叫出這個list後打 :+行號，就可以跳到要尋找的行號，非常方便。
2011/03/20
用 GnuCash 記帳 Accounting with GnuCash - 3
外幣的觀念也是一樣，因為是以新台幣為出發點，最後就要換回新台幣結算，因此和股票一樣，新增一個外幣計價的項目，將台幣轉換過去，也是一樣是資產轉換，結算也是一樣換成封關來結算，只是，記錄盈虧比較怪異一點。
Tracking Currency Investments (How-To)
和股票一樣，盈虧需要一個平衡項，這個平衡項也是外幣，但是如果直接登記在外幣項的話會讓外幣增加，這是不對的，參考manual的作法，先登記獲利或虧 損，再登記外幣的平衡項，這時後會跳出匯率視窗，要登記轉換總數為0，也就是匯率為0的意思，這也是一個虛項，將台幣計價的獲利或虧損轉換成價值為0的外 幣。
cash_old -> other currency =
cash_new <- other currency =
other currency(0) = gain or loss
--> (ignore fee)
cash_new - cash-old = gain or loss
配股配息一樣要入帳，配股比較簡單，但是我還沒遇過，也許有錯，配股其實只要把股票項增加就好，因為股票項是隱藏的，也不會影響平衡；反之配息會讓現金增加，不得不考慮平衡的問題，首先配息會讓股價成本降低，要做個假的賣出和買進(如果有處理配息的功能的話，就不要照我這樣做)，這樣會讓現金增加，同樣的錢不可能憑空增加，要再加一筆收入去平衡。
stock_old sell - stock_new buy + cash =
stock(hidden) = dividend income
BTW，這一年也遇到公司合併，就會有股票轉換的問題，這就簡單多了，只要把原股轉新股就可以了。
整本帳簿的結算其實很簡單，只要選 Tools/Close Book，就會自動把 Income 加總，Expense 加總，然後相減，列入Equity 這項，基於 Assets = Liability + Owner's Equity + (Income - Expenses)的原則，就可以檢查得出來自己的總帳目有沒有平衡，只要有如實記錄，理論上應該是平衡的，要是我念英文有像記帳那麼有恆心就好...。
Tracking Currency Investments (How-To)
和股票一樣，盈虧需要一個平衡項，這個平衡項也是外幣，但是如果直接登記在外幣項的話會讓外幣增加，這是不對的，參考manual的作法，先登記獲利或虧 損，再登記外幣的平衡項，這時後會跳出匯率視窗，要登記轉換總數為0，也就是匯率為0的意思，這也是一個虛項，將台幣計價的獲利或虧損轉換成價值為0的外 幣。
cash_old -> other currency =
cash_new <- other currency =
other currency(0) = gain or loss
--> (ignore fee)
cash_new - cash-old = gain or loss
配股配息一樣要入帳，配股比較簡單，但是我還沒遇過，也許有錯，配股其實只要把股票項增加就好，因為股票項是隱藏的，也不會影響平衡；反之配息會讓現金增加，不得不考慮平衡的問題，首先配息會讓股價成本降低，要做個假的賣出和買進(如果有處理配息的功能的話，就不要照我這樣做)，這樣會讓現金增加，同樣的錢不可能憑空增加，要再加一筆收入去平衡。
stock_old sell - stock_new buy + cash =
stock(hidden) = dividend income
BTW，這一年也遇到公司合併，就會有股票轉換的問題，這就簡單多了，只要把原股轉新股就可以了。
整本帳簿的結算其實很簡單，只要選 Tools/Close Book，就會自動把 Income 加總，Expense 加總，然後相減，列入Equity 這項，基於 Assets = Liability + Owner's Equity + (Income - Expenses)的原則，就可以檢查得出來自己的總帳目有沒有平衡，只要有如實記錄，理論上應該是平衡的，要是我念英文有像記帳那麼有恆心就好...。
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