Purpose
Cortex-A8 Technical Reference Manual Revision: r3p2 3.1. About the system control coprocessor
The purpose of the system control coprocessor, CP15, is to control and provide status information for the functions implemented in the processor. The main functions of the system control coprocessor are:
- overall system control and configuration
- cache configuration and management
- Memory Management Unit (MMU) configuration and management
- preloading engine for L2 cache
- system performance monitoring.
Instruction
mcr{cond} p15, <opcode_1>, <rd>, <CRn>, <CRm>, <opcode_2>mrc{cond} p15, <opcode_1>, <rd>, <CRn>, <CRm>, <opcode_2>
Following the order, CRn -> Op1 -> CRm -> Op2, to look up the entry of target register in manual.
Cortex-A15 MPCore Technical Reference Manual Revision: r3p2 4.2. Register summary
Table 4.1. Column headings definition for CP15 register summary tables
Catagory
| Function | CP15 Registers |
| System Configuration | c0 |
| System Control | c1 |
| Translation Base Control | c2 |
| Domain Access Control | c3 |
| Faults | c5/c6 |
| Cache Operations | c7 |
| TLB Operations | c8/c10 |
| Performance Monitor | c9 |
| L2 Control | c9 |
| Pre-load Engine | c11 |
| Interrupts | c12 |
| Process ID | c13 |
| Memory Arrays | c15 |
Table 4.3. c1 register summary
The mapping is c1 -> 0 -> c0 -> to access System Control Register.
mcr p15, 0, rX, c1, c0, 0 : write arm to coprocessor , rX -> {c1, 0, c0, 0}
mrc p15, 0, rX, c1, c0, 0 : read coprocessor to arm , {c1, 0, c0, 0} -> rX
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